Immediately following configuration on the Arria 10 device, when you type run_example_design in system console, the 100G Interlaken IP core hardware example design performs the following actions:

1. Resets the 100G Interlaken IP core.
2. Configures the 100G Interlaken IP core in internal loopback mode.
3. Sends a sequence of 100 256-byte Interlaken packets with predefined data in the payload to the TX user data transfer interface of the IP core.
   Note: If the IP core is in dual segment mode, the hardware example design sends 65-byte bursts on the TX user data transfer interface. If the IP core is in single segment, Interleaved mode, the hardware example design sends 128-byte bursts.
4. Checks the received packets and reports the status.

The packet checker included in the hardware example design provides the following basic packet checking capabilities:

• Checks that the transmitted packet sequence is not violated
• Checks that the received data matches expected values