Visible to Intel only — GUID: mwh1429798248549
Ixiasoft
Visible to Intel only — GUID: mwh1429798248549
Ixiasoft
2.1. Enhanced Timing Analysis for Intel® Arria® 10 Devices
These algorithms are enabled by default for Intel® Arria® 10 devices, and can be enabled for earlier families with an assignment. The new analysis engine analyzes the timing graph a fixed number of times. Previous Timing Analyzer analysis analyzed the timing graph as many times as there were constraints in your Synopsys Design Constraint (SDC) file.
The new algorithms also support incremental timing analysis, which allows you to modify a single block and re-analyze while maintaining a fully analyzed design.
set_global_assignment -name TIMEQUEST2 ON