P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide

Download PDF
ID 683038
Date 4/04/2024
Public
Document Table of Contents
Document Table of Contents x
1. About the P-tile Avalon® Streaming Intel® FPGA IP for PCI Express Design Examples 2. Quick Start Guide 3. P-tile Avalon® Streaming IP for PCI Express* Design Example User Guide Archives 4. Document Revision History for the Intel® P-Tile Avalon® Streaming Hard IP for PCIe* Design Example User Guide
1. About the P-tile Avalon® Streaming Intel® FPGA IP for PCI Express Design Examples x
1.1. Overview 1.2. Functional Description for the Programmed Input/Output (PIO) Design Example 1.3. Functional Description for the Single Root I/O Virtualization (SR-IOV) Design Example 1.4. Functional Description for the Performance Design Example 1.5. Hardware and Software Requirements
2. Quick Start Guide x
2.1. Directory Structure 2.2. Generating the Design Example 2.3. Simulating the Design Example 2.4. Compiling the Design Example 2.5. Installing the Linux Kernel Driver 2.6. Running the Design Example
2.3. Simulating the Design Example x
2.3.1. Steps to Run Simulations 2.3.2. Testbench
2.3.1. Steps to Run Simulations x
2.3.1.1. Running Simulations Using QuestaSim* 2.3.1.2. Running Simulations Using VCS* 2.3.1.3. Running Simulations Using Riviera*
2.3.2. Testbench x
2.3.2.1. Test Driver Module 2.3.2.2. PIO Design Example Testbench 2.3.2.3. SR-IOV Design Example Testbench 2.3.2.4. Performance Design Example Testbench
2.6. Running the Design Example x
2.6.1. Running the PIO Design Example 2.6.2. Running the SR-IOV Design Example 2.6.3. Running the Performance Design Example
1. About the P-tile Avalon® Streaming Intel® FPGA IP for PCI Express Design Examples
2. Quick Start Guide
3. P-tile Avalon® Streaming IP for PCI Express* Design Example User Guide Archives
4. Document Revision History for the Intel® P-Tile Avalon® Streaming Hard IP for PCIe* Design Example User Guide

2.5. Installing the Linux Kernel Driver

Before you can test the design example in hardware, you must configure the FPGA and then restart your computer. After that, install the Linux kernel driver. You can use this driver to perform the following tests:
  • A PCIe* link test that performs 100 writes and reads
  • Memory space DWORD1 reads and writes
  • Configuration Space DWORD reads and writes

In addition, you can use the driver to change the value of the following parameters:

  • The BAR being used
  • The selected device (by specifying the bus, device and function (BDF) numbers for the device)

Complete the following steps to install the kernel driver:

  1. Navigate to ./software/kernel/linux under the example design generation directory.
  2. Change the permissions on the install, load, and unload files:
    $ chmod 777 install load unload
  3. Install the driver:
    $ sudo ./install
  4. Verify the driver installation:
    $ lsmod | grep intel_fpga_pcie_drv
    Expected result:

    intel_fpga_pcie_drv 17792 0

  5. Verify that Linux recognizes the PCIe* design example:
    $ lspci -d 1172:000 -v | grep intel_fpga_pcie_drv
    Note: If you have changed the Vendor ID, substitute the new Vendor ID for Intel® 's
    Vendor ID in this command.
    Expected result:

    Kernel driver in use: intel_fpga_pcie_drv

1 Throughout this user guide, the terms word, DWORD and QWORD have the same meaning that they have in the PCI Express Base Specification. A word is 16 bits, a DWORD is 32 bits, and a QWORD is 64 bits.
Level Two Title