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oneAPI Programming Model
In heterogenous computing, the host processor takes advantage of accelerator devices to execute code more efficiently.
The oneAPI programming model supports two important portable methods of heterogenous computing: Data Parallel C++ with SYCL* and OpenMP* for C, C++, and Fortran.
SYCL
SYCL is a cross-platform abstraction layer that enables code for heterogeneous processors to be written using standard ISO C++ with the host and kernel code for an application contained in the same source file. The DPC++ open source project is adding SYCL support to the LLVM C++ compiler. The Intel® oneAPI DPC++/C++ Compiler is available as part of the Intel® oneAPI Base Toolkit.
SYCL Kernel Compatibility
In accordance with the SYCL 2020 specification, DPC++ will detect uses of optional kernel features in SYCL kernels. A kernel is only considered compatible with a device if that device reports true in device::has() for all aspects required by the kernel. Effectively, this means that a kernel_bundle created with a given device will not contain kernels that have requirements that the device does not support and attempting to launch kernels on a device that they are not compatible with will result in a sycl::exception being thrown.
As determining the origin of a requirement in a kernel can be difficult, the user can add the sycl::device_has attribute to the kernels. The compiler will warn the user of any aspect requirements deduced for the kernel that do not appear in the kernel’s sycl::device_has attribute. Note that this behavior is required by the SYCL 2020 specification.
OpenMP*
OpenMP has been a standard programming language for over 20 years, and Intel implements version 5 of the OpenMP standard. The Intel oneAPI DPC++/C++ Compiler with OpenMP offload support is available as part of the Intel oneAPI Base Toolkit, and Intel® HPC Toolkit. The Intel® Fortran Compiler Classic and Intel® Fortran Compiler with OpenMP offload support is available as part of the Intel® HPC Toolkit.
NOTE:
OpenMP is not supported for FPGA devices.
The next sections briefly describe each language and provide pointers to more information.