Install Software for Intel FPGA Development Flows
Field-programmable gate arrays (FPGAs) are configurable integrated circuits that you can program to implement arbitrary circuit topologies. Classified as spatial compute architectures, FPGAs differ significantly from fixed Instruction Set Architecture (ISA) devices such as CPUs and GPUs. FPGAs offer a different set of optimization trade-offs from these traditional accelerator devices. While you can compile SYCL* code for CPU, GPU or FPGA, the compiling process for FPGA development is somewhat different than that for CPU or GPU development.
SYCL supports accelerators in general. The Intel® oneAPI DPC++/C++ Compiler implements additional FPGA-specific support to assist FPGA code development. For additional information about the FPGA flows, refer to Types of SYCL* FPGA Compilation topic in the Intel oneAPI Programming Guide.
How to Work With FPGA?
The following sections describe various methods you can work with FPGA:
Use Preinstalled Environment
If you are new to oneAPI and FPGA development, then Intel recommends using the Intel® DevCloud. Intel® DevCloud provides a preinstalled development environment with free access to Intel® oneAPI toolkits and components, latest Intel® hardware, optimized frameworks, tools, and libraries to speed up your learning and project prototyping.
Intel® DevCloud is already set up with an Intel® Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA and Intel® FPGA PAC D5005 (previously known as Intel® PAC for Intel® Stratix® 10 SX FPGA) and the necessary software stack. For more information, refer to Get Started with Intel® oneAPI Base Toolkit on the DevCloud.
Set Up Your Own System and Install Software
If you want to set up your own system, then use one of these methods:
Set up a single system: In this method, you can use a single system acting as both the runtime and development system. Install the Intel oneAPI Base Toolkit, Intel® Quartus® Prime Software, and custom platform/FPGA device (hardware-run, machine-specific) on the same system.
Set up separate development and runtime systems: In this method, you install the custom platform/FPGA device on the runtime system and run only the design. On the development system, install the Intel® Quartus® Prime software to compile and generate the FPGA bitstream. Refer to Intel® Quartus® Prime Software, Install Intel® FPGA Board Packages sections for more information.
Set up a cloud on-premise: A cloud on-premise helps reduce the hardware cost necessary for development. In this workflow, you can set up two development systems, one for the FPGA development and the other for the Intel® Quartus® Prime software compilation. The runtime system can be different. After setting up your development systems, install the physical card on the system. Refer to the Intel® oneAPI DPC++ /C++ Library System Requirements for FPGA requirements.
On the first development system with lower configurations (8 GB RAM), iterate over your designs using the emulation and report flow to verify code correctness. You just need to install the Intel® oneAPI Base Toolkit package on this system. For more information about emulation and report flow, refer to the Types of FPGA Compilation.
On the second development system with higher configurations (48 or 64 GB RAM based on the Intel PAC you use), install the Intel® Quartus® Prime Software. Perform Intel® Quartus® Prime compilation using either the hardware flow or the device link flow. For more information, refer to the FPGA Flow in the Intel® oneAPI Programming Guide.
- FPGA IP Authoring flow is now supported. Developing IP components/hardware with oneAPI requires the Intel oneAPI Base Toolkit and Intel® Quartus® Prime Software. For details about getting started with the IP component development flow, refer to Getting Started with Intel® oneAPI Toolkits and Intel® Quartus® Prime Software and FPGA Flow in the Intel® oneAPI Programming Guide.
Intel® Quartus® Prime Software is required only for simulation and hardware generation flows, and integrating your IP component into your design. You can generate reports and RTL code, and run the emulation stage with only the Intel® oneAPI Base Toolkit.
For additional details, refer to the following topics: