FPGA Boards for the Intel® FPGA Academic Program

Terasic Development and Education Boards

The Terasic Development and Education (DE-series) boards have a rich feature set that targets applications for teaching and projects, embedded systems and robotics, and research. Intel provides an extensive set of academia-focused material specifically designed for use with these DE-series boards.

Intel offers a limited donation program for qualified professors and instructors.

Program Membership

Teaching Curriculum & Materials

Teaching and Project Boards

These boards are designed to meet your educational needs for both undergraduate and graduate level courses. They include:

A rich set of basic input and output features, such as robust switches, LEDs, seven-segment displays, and commonly-used I/O interfaces
Modern, powerful FPGAs for implementing digital designs from simple logic circuits to complete systems
More advanced features including a variety of memory devices, audio and video capability, as well as Ethernet and USB connectivity
High-quality, robust board design and manufacturing, with protection circuitry on all I/O pin connectors

DE1-SoC

The DE1-SoC board is the recommended platform for teaching and projects.

Customer	Price*
Academic	$175 Order from Terasic
Commercial	$249 Order from Terasic

Feature	Description
FPGA	Cyclone V SoC FPGA 5CSEMA5F31 with EPCQ256 256-Mbit serial configuration device
Processors	ARM* Cortex-A9 dual core (925 MHz) Nios® II processor
I/O Interfaces	Built-in USB-Blaster II for FPGA configuration Line in/out, microphone in (24-bit audio CODEC) Video out (VGA 24-bit DAC) Video in (NTSC/PAL/Multiformat) Infrared port 10/100/1000 Ethernet Two-port USB 2.0 host (Type A) 3-axis accelerometer PS/2 dual mouse and keyboard port Expansion headers (two 40-pin headers)
Memory	1 GB DDR3 SDRAM (HPS), 64 MB SDRAM (FPGA) microSD* memory card slot
ADC	8 channels 12-bit resolution 500 kilo-samples per second 0-2.5V or 0-5V programmable range
Displays	Six 7-segment displays
Switches and LEDs	10 toggle switches 10 LEDs Four debounced push-button switches
Clocks	50 MHz oscillator

Resource	Downloads
User Manual	PDF
Datasheets	ZIP
Intel® Quartus® Prime Design Software Setting File with Pin Assignments	QSF
Intel® Quartus® Software Synopsis Design Constraints	SDC

DE10-Standard

The DE10-Standard board has the same feature set as the DE1-SoC board but with some enhancements: a larger FPGA, more memory, an HSMC high-speed connector, and black & light mini LCD. It's ideal for those that need a bit more.

Customer	Price*
Academic	$259 Order from Terasic
Commercial	$350 Order from Terasic

Feature	Description
FPGA	Cyclone V SoC 5CSXFC6D6F31C6N with EPCS128 128-Mbit serial configuration device
Processors	ARM Cortex-A9 Dual Core (925 MHz) Nios II processor
I/O Interfaces	Built-in USB-Blaster II for FPGA configuration Line in/out, microphone in (24-bit audio CODEC) 128 x 64 dots LCD module with backlight Video out (VGA 24-bit DAC) Video in (NTSC/PAL/Multiformat) Infrared port 10/100/1000 Ethernet Two-Port USB 2.0 host (Type A) 3-axis accelerometer PS/2 dual mouse and keyboard port HSMC connector Expansion headers (40-pin header)
Memory	1 GB DDR3 SDRAM (HPS), 64 MB SDRAM (FPGA) microSD* memory card slot
ADC	8 channels 12-bit resolution 500 kilo-samples per second 0-2.5 V or 0-5 V programmable range
Displays	Six 7-segment displays
Switches and LEDs	10 toggle switches 10 LEDs Four debounced push-button switches
Clocks	50 MHz oscillator

Resource	Downloads
User Manual	PDF
Datasheets	ZIP
Quartus Setting File with Pin Assignments	QSF
Quartus Synopsis Design Constraints	SDC

DE10-Lite

The DE10-Lite board has a subset of the features on the DE1-SoC board. It has all of the basic features that are provided by our more expensive boards, but lacks some of the more advanced capabilities.

Customer	Price*
Academic	$55 Order from Terasic
Commercial	$85 Order from Terasic

Feature	Description
FPGA	Intel® MAX® 10 FPGA 10M50DAF484C7G with integrated dual ADCs. Each ADC supports one dedicated analog input and eight dual function pins
Processors	Nios II processor
I/O Interfaces	Built-in USB-Blaster for FPGA configuration Video out (VGA 12-bit DAC) 3-axis accelerometer Arduino header (Uno R3 compatibility) Expansion header (40-pin header)
Memory	64 MB SDRAM
Displays	Six 7-segment displays
Switches and LEDs	10 toggle switches 10 LEDs Four debounced push-button switches
Clocks	50 MHz oscillator

Resource	Downloads
User Manual	PDF
Datasheets	ZIP
Quartus Setting File with Pin Assignments	QSF
Quartus Synopsis Design Constraints	SDC

Embedded & Robotics Boards

These boards are small in size but rich in features—perfect for embedded systems and robotics courses or projects.

DE10-Nano

Customer	Price*
Academic	$99 Order from Terasic
Commercial	$130 Order from Terasic

Feature	Description
FPGA	Cyclone V SoC 5CSEBA6U23I7 with EPCS128 128-Mbit serial configuration device
Processors	ARM Cortex-A9 Dual Core (925 MHz) Nios II processor
I/O Interfaces	Built-in USB-Blaster II for FPGA configuration HDMI TX, compatible with DVI 1.0 and HDCP v1.4 Gigabit Ethernet USB On-The-Go (OTG) port 3-axis accelerometer Arduino header (Uno R3 compatibility) UART to USB Mini-B connector Expansion headers (two 40-pin headers)
Memory	1GB DDR3 SDRAM (HPS) microSD* memory card slot
ADC	8 channels 12-bit resolution 500 kilo-samples per second
Switches and LEDs	4 toggle switches 8 LEDs Two debounced push-button switches
Clocks	50 MHz oscillator

Resource	Downloads
User Manual	PDF
Datasheets	ZIP
Quartus Setting File with Pin Assignments	QSF
Quartus Synopsis Design Constraints	SDC

Research Boards

These are designed for projects that require the fastest or largest FPGAs and the latest memory and peripheral components.

DE10-Pro

Customer	Price*
Academic	Contact Terasic for special pricing.
Commercial	Order from Terasic

Feature	Description
FPGA	Intel® Stratix® 10 GX FPGA
Processors	ARM Cortex-A53 quad-core (1.5 GHz) Nios II processor
I/O Interfaces	Built-in USB-Blaster II for FPGA configuration; JTAG mode PCI Express* Gen3 x16 edge connector Four QSFP28 connectors Temperature sensor Power monitor Fan control
Memory	128 MB FLASH 4 independent DDR4 SO-DIMM sockets with ECC, up to 8 GB 1200 MHz for each socket
Available Memory Modules (sold separately)	DDR4-2666/2400 for FPGA Core Speed 1/2 FPGA QDRII+ 550 MHz 144 MBits QDRIV 1066 MHz 144 MBits
Switches and LEDs	Two toggle switches Four LEDs Two debounced push-button switches
Clocks	50 MHz oscillator

Documentation from Terasic

DE5a-Net-DDR4

Customer	Price*
Academic	Contact Terasic for special pricing.
Commercial	Order from Terasic

Feature	Description
FPGA	Intel® Arria 10 GX FPGA 10AX115N3F45E2SG with EPCS128 128-Mbit serial configuration device
Processors	Nios II processor
I/O Interfaces	Built-in USB-Blaster II for FPGA configuration PCI Express* x8 Edge Connector 10-gigabit Ethernet ports SFP+ (x4) One RS422 expansion header
Memory	2 DDR3 memory slots 36 MB QDRII+ SRAM 256 MB Flash
Displays	Two 7-segment displays
Switches and LEDs	Two toggle switches Four LEDs Four debounced push-button switches
Clocks	50 MHz oscillator External SMA External SMA clock output

Documentation from Terasic

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