Fuel Data-Centric Innovation with High-Bandwidth and Low Power External Memory Interface
Achieve breathtaking performance for high-end and midrange applications with the first FPGA family to feature the newest, cutting-edge, energy-efficient memory solutions with bandwidth speeds up to 1Tb/s1.
Massive Memory Bandwidth and Power Efficiency
Modern high-end and midrange applications, driven by data and memory demands, require power-efficient, high-performance solutions. The surge in data traffic has outpaced previous memory bandwidths, causing bottlenecks. To address this, next-gen FPGAs are crucial, providing exceptional memory bandwidth and power efficiency. Intel Agilex® FPGAs cater to this transformation with DDR5, LPDDR5, and HBM2e, achieving speeds up to 1Tb/s, fueling data-centric innovation.
The Go-To Solution for Massive Memory Bandwidth
Watch how Intel Agilex® 7 FPGA M-Series provides a solution to your most challenging memory bandwidth applications.
Learn How Intel FPGAs with External Memory Interfaces Create Solutions
Overcoming Memory Bottlenecks
Intel Agilex® 7 FPGAs M-Series are equipped with high fabric densities, in-package HBM2e memory, and DDR5 interfaces for high-memory bandwidth applications across different industries.
Addressing Memory Bandwidth and Compute-Intensive Challenges
Intel Agilex® 7 FPGAs M-Series address high memory-bandwidth applications with in-package HBM memory and hardened memory Network on Chip.
Intel Agilex® 5 FPGA and SoC FPGAs Include Memory Innovations
FPGAs integrate powerful features: on-chip memory, high-speed transceivers, dedicated IP blocks like DSP, SDRAM controllers, and multi-core processors. Scalable integrated memory controllers support DDR4, DDR5, LPDDR4, and LPDDR5 SDRAM.
Estimate and Compare the Performance of External Memory Interfaces
The External Memory Interface Spec Estimator—a parametric tool—allows you to find and compare the performance of the supported external memory interfaces in Intel® FPGAs.
FAQs
Frequently Asked Questions
- The HBM2e standard, supported in Intel Agilex 7 devices, is compliant with the latest JEDEC JESD235C standard vs. JESD235A with Intel Stratix 10.
- Intel Agilex 7 FPGA M-Series achieves the maximum bandwidth of 410 GB/s per stack and Intel® Stratix® 10 devices achieve 256GB/s per stack.
- Intel Agilex 7 FPGA M-Series HBM2e stack contains 4 to 8 layers and each layer’s die capacity is 2GB providing a max density of 16GB/stack.
- Intel® Stratix® 10 devices also contain 4 to 8 layers and each layer’s die capacity is 1GB providing a max density of 8GB per stack.
Product and Performance Information
Agilex™ 7 FPGA M-Series theoretical maximum bandwidth of 1.099 TBps with 2 banks of HBM2e using ECC as data and 8 DDR5 DIMMs as compared to Xilinx Versal HBM memory bandwidth of 1.056 TBps as of October 14, 2021, and to Achronix Speedster 7t memory bandwidth of 0.5 TBps as of October 14, 2021.