Nios® II Processor Bare-Metal Developer Center

Introduction

Bare-metal development uses a software runtime environment without an operating system (OS) or a real-time operating system (RTOS). To support bare-metal development, Intel offers a hardware abstraction layer (HAL) library for the Nios II processor within Intel® FPGAs. You can use this library as a device driver package for the Nios II processor systems within the FPGA and provide a consistent interface to the peripherals in your system.

The following links will help you get started with bare-metal development on Intel FPGAs. If you are a first-time user, we recommend that you follow the resources linearly.

1. Prerequisites

Create Your My Intel Account

• Create your My Intel account from the My Intel page.
• Your My Intel account allows you to file service requests, register for training courses, download software, access resources, and more.

Design Considerations

Why Bare Metal?

• The advantages of using a bare-metal approach are:
• Absolute control of hardware
• Increased efficiency
• Minimal size (both flash and memory footprint)
• No dependency on other source codes or libraries
• Ease in validation and code coverage analysis

You may also consider bare-metal development if you:

• Do not require multi-task or multi-thread operations
• Are performing board bring-up and need to focus on each peripheral individually
• Are re-using existing legacy code that is already developed as bare metal

Bare-Metal Considerations

To develop a bare-metal application for the Nios II processor, you must be familiar with developing runtime capabilities to ensure that your application makes efficient use of the resources available in your CPU subsystem. Examples of what may be required are as follows:

• In-depth knowledge of the hardware platform
• Developing runtime capabilities to manage the process between the core and the cache subsystem if you want to fully utilized the CPU subsystem, as a typical bare-metal application uses only a single core
• Developing capabilities to manage and schedule processes, handle inter-process communications, and synchronize events within your application

If your scheduled project does not allow for the effort it may take to become familiar with the above points, then it is recommended that you consider using a commercial Linux* or RTOS solution.

Bare-Metal Alternatives

Taking into account the above considerations, it often makes sense to use an operating system to realize the maximum performance from the Nios II processor with minimal effort.

Linux OS

With the introduction of a memory management unit (MMU) for the Nios II processor, you have a wide range of Linux providers to choose. From commercial support, industry leaders, to a free open-source distribution, Intel's embedded Linux partners offer the right level of support for your Linux project.

• RocketBoards.org - Refer to the Nios II Linux User Manual for a community-supported open source Linux distribution
• LinuxLink by Timesys - Select Intel FPGA from Manufacturer in the Boards filter tab
• Wind River - Select Intel FPGA from Hardware Vendors in the Board Support Packages tab
• System Level Solutions (SLS) - Select your desired Board Support Pkgs in the Downloads tab

RTOS

Using a simple RTOS is easy. It is similar to using C libraries of functions that are already implemented instead of writing those functions yourself. Some RTOS provide full support for all the peripherals, while others provide support for only a subset. In cases where only a subset of the peripherals are supported by the RTOS that you have chosen, the HAL code provides the additional support needed. For details, refer to the Nios II Processor Ecosystem web page.

A free evaluation of the MicroC/OS-II RTOS and full ANSI C source code is included with the Nios II Embedded Design Suite (EDS) installation. For details, refer to the Micrium MicroC/OS-II Real-Time Operating System web page.

Design Flow Diagram

The figure below illustrates the general Nios II processor system development flow.

The Nios II processor development flow consists of three elements as follows:

• Hardware design
  
• Software design
• System design, involving both hardware and software

You begin your Nios II processor development by developing a system concept and performing a system requirements analysis. Next, you create and generate the system in the Platform Designer, and produce a .sopcinfo file. The Platform Designer includes Nios II processor cores, standard components, custom instruction, and peripheral logic. After system generation, hardware and software flows can be initiated.

For Nios II processor hardware development, you must:

• Integrate the Platform Designer system with the Intel® Quartus® Prime software project.
  
• Assign pin locations.
• Configure timing requirements and other design constraints.
• After compiling the hardware design, download the .sof file to the target board.

For Nios II processor software development, you must:

1. Develop your software with the Nios II Software Build Tools (SBT) for Eclipse. The Nios II software includes the HAL, peripheral drivers, user C/C++ application codes, and custom libraries.
   
2. Download the .elf file to the Nios II processor system on the target board after building the application and board support package (BSP). The Nios II processor system is ready for testing and debugging.

If you find that your software does not meet specifications during the test, return to the beginning of the software flow and check the application codes, drivers, and BSP to correct any errors and ensure that the Nios II processor system executes correctly.

If the hardware does not meet specifications, return to the Platform Designer system define and generation step, and restart both the hardware and software flow. The key file required to generate the application software is the Platform Designer information file (.sopcinfo). Because this file describes hardware components and connections, you must regenerate this file if you make a hardware change. The system is complete when both the software and hardware meet specifications.

2. Getting Started

Select Target Board

We recommend starting your development on an evaluation or development kit provided by Intel because most of the examples available are targeted to run on those boards.

• Nios II processor evaluation kits:
• Low cost, easy to use
• Full of design examples, tutorials, and software examples
• Many Nios II processor community-contributed design examples and software on the Intel FPGA Wiki site
• Example: Intel® MAX® 10 FPGA Nios® II Embedded Evaluation Kit (NEEK)
• Intel FPGA development kits:
• All new kits include pre-packaged Nios II processor design examples entitled Board Update Portal
• Getting Started design of a processor and Ethernet media access control (MAC) with a HTML web server application

Refer to All Development Kits for a list of available boards. To view the list of board-specific design examples that are available in the Design Store, select your desired Development Kit from the pull-down menu.

Install Nios II Embedded Design Suite (EDS)

To install the Nios II Embedded Design Suite (EDS), first you have to download the Intel® Quartus® Prime software from the Download Center. The Intel FPGA Software Installation and Licensing provides detailed instructions for downloading and installing the Intel® Quartus® Prime software, which includes the Nios II EDS.

The Nios II EDS is a comprehensive development package for Nios II software designs. The Nios II EDS contains not just development tools, but also software, device drivers, a bare-metal HAL library, a commercial-grade network stack software, and an evaluation version of an RTOS.

Create Your First Nios II Processor System

The AN 717: Nios II Hardware Development Tutorial and Nios® II Software Developer Handbook introduce you to the system development flow for the Nios II processor. Using the Intel® Quartus® Prime software and the Nios II EDS, you build a Nios II hardware system design and create a software program that runs on the Nios II system and interfaces with components on Intel® development boards.

3. Creating Your Own Project

Types of Bare-Metal Projects

There are two different types of projects that can be managed by the Nios II EDS.

The following table illustrates the differences between the two project types, aside from the Eclipse GUI.

Recommended Method to Create Your Project

Writing software for the Nios II processor is similar to writing software for any other microcontroller family. Modifying existing code is a common, easy way to learn how to write software in a new environment. The Nios II EDS provides many software design examples that you can examine, modify, and use in your own programs.

Each Nios II processor program example consists of an application project, optional user library projects, and a BSP project.

• Application project: consists of a collection of source code, plus a makefile. A typical characteristic of an application is that one of the source files contain function main( ). An application includes code that calls functions in libraries and BSPs. The makefile compiles the source code and links it with a BSP and one or more optional libraries to create an .elf file.
• User library project: is a collection of source code compiled to create a single library archive file (.a). Libraries often contain reusable, general-purpose functions that multiple application projects can share. A collection of common arithmetical functions is one example.
• BSP project: is a specialized library containing system-specific support code, such as the HAL, an optional custom newlib C standard library, device drivers, optional software packages, and an optional real-time operating system.

Follow these steps to create a software project with the Nios II SBT:

1. Obtain the hardware design on which the software is to run. Regardless of whether it is a Nios II processor design example or a design developed by someone else, you need to have the SOPC information file (.sopcinfo).
2. Generate a BSP settings file (settings.bsp) and next, a BSP makefile after defining the features your BSP requires.
3. Create a user library (optional). If you need to include a custom software user library, collect the user library source files in a single directory, and generate a user library makefile.
4. Write your application source code and generate an application makefile.
5. Build the software project to produce an .elf file and run the application on your board.

The Nios II SBT includes tools to create makefiles, which are key in building Nios II C and C++ projects. It is not necessary to use the generated makefiles if you prefer to write your own. However, we would recommend that you manage and modify your BSP makefiles by using the SBT.

To learn more, refer to the Nios® II Software Developer Handbook.

4. Examples

Design Examples

There are plenty of design examples available from Intel's Design Store to help you get started with Intel FPGA products. All examples can be used as a starting point for your own designs, and some examples are customized for specific development kits. Search for Nios II processor design examples by selecting Nios II in IP Core pull-down menu. You may also filter other search criteria, such as device family, development kit, and Intel® Quartus® Prime software version.

How to Boot a Nios II Processor Application?

To learn how to boot a Nios II processor application, refer to the Nios II Configuration and Booting Solutions section in the Embedded Design Handbook.

There are various boot or software execution options available with the Nios II processor. You can configure the Nios II processor to boot and execute software from different memory locations.

Nios II processor supported boot memories:

• Common flash interface (CFI) flash
• User flash memory (UFM) in Intel® MAX® 10 FPGA devices
• Serial flash EPCQ configuration device
• Quad serial peripheral interface (QSPI) flash
• On-chip memory (OCRAM)

Nios II processor booting options:

• Execute-in-place
• Copied from flash memory to RAM using the boot copier

5. Additional Resources

Support Center

Help is just a click away! The Support Center provides online technical resources from training classes to design examples to forums that guide you through every step of the design process.

Knowledge Base

The Knowledge Base provides a vast number of support solutions, reference articles, error messages, and troubleshooting guides. It is also fully searchable.

Intel FPGA Community

Intel Community is a community website enabling collaboration between Intel FPGA users. Check out the Nios II Embedded Design Suite (EDS) section under FPGA Developers. Use the search engine to find relevant material. You are also encouraged to update and contribute.

My Intel

Your My Intel account allows you to file a service request to get help on specific topics. You can also use it to register for training classes and access other resources. Registration is required.

Foundational Learning - Training Classes

The following table lists the foundational training classes that you can take before you start developing your design.

Additional Documentation and Resources

The following documentation serve as a primary reference for the Nios II processor.

• The Nios II Software Developer Handbook describes the basic information needed to develop embedded software for the Nios II Gen2 processor. The chapters in this handbook describes the Nios II processor software development environment, the Nios II Embedded Design Suite (EDS) tools that are available and the process for developing software.
• The Embedded Design Handbook complements the primary documentation for embedded system development. It describes how to most effectively use the tools, and recommends design styles and practices for developing, debugging, and optimizing embedded systems using Intel-provided tools. The handbook also introduces concepts to new users of Intel's embedded solutions, and helps to increase the design efficiency of an experienced user.
• The Nios II Processor Reference Guide describes the Nios II Gen2 processor from a high-level conceptual description to the low-level details of implementation. The chapters in this handbook describe the Nios II processor architecture, the programming model, and the instruction set.
• The Embedded Peripherals IP User Guide describes the Intel-provided IP cores that work seamlessly with the Nios II processor and are included in the Intel® Quartus® Prime design software. The IP cores are optimized for Intel® devices and can be easily implemented to reduce design and test time.

For a complete list of Nios II processor-related documentation, visit the Nios II Processor Support page.

Engineer-to-Engineer Videos

Explore the pool of How-To videos that are brought to you by Intel® engineers. The Intel® FPGA Quick Videos contains how-to videos to help you develop your FPGA projects.

Related Links

• Embedded Software Developer Center
• FPGA Documentation Index
• Software Download and Installation
• Download Center

• Intel® FPGA Support Resources