Article ID: 000100438 Content Type: Errata Last Reviewed: 02/10/2025

Why might the unaligned access of back-to-back single beat D2H ST transactions not be transmitted completely by Scalable Scatter-Gather DMA IP?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Scatter-Gather DMA Controller Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® Prime Pro Edition Software version 24.3.1 and earlier, unaligned access of back-to-back single beat D2H ST transactions might not be transmitted completely by Scalable Scatter-Gather DMA IP. As a result, the device port might hung and soft reset is required to resume subsequent transactions.

    Resolution

    This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.

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