Article ID: 000096802 Content Type: Error Messages Last Reviewed: 12/14/2023

Why do I see elaboration errors on Cadence Xcelium* and Synopsys VCS* simulators with Intel® FPGA F-tile IPs?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a change in the Intel® Quartus® Prime Pro Edition Software version 23.3 and 23.2, you might see these errors at elaboration with the Cadence Xcelium* and Synopsys VCS* simulators:

    Synopsys VCS* simulator 

    Error-[ICPD_INIT] Illegal combination of drivers <QUARTUS_INSTALL_DIR>/eda/sim_lib/synopsys/ctfb_hssi_atoms_ncrypt.sv, 4246150

    Cadence Xcelium* simulator 

    xmelab: *E,MULAXX (<QUARTUS_INSTALL_DIR>/eda/sim_lib/ctfb_hssi_atoms_ncrypt.sv): Multiple drivers to always_ff output variable clairvoyance_match detected..

     

    These errors only occur when simulating Intel® FPGA F-tile IPs.

     

    Resolution

    To work around these problems, use simulator-specific switches to proceed with the simulation.

    Synopsys VCS* simulator:

    Use the elaboration switch ( -ignore initializer_driver_checks) in your script.

     

    Example:

    USER_DEFINED_ELAB_OPTIONS="-ignore initializer_driver_checks ”

    sh $QSYS_SIMDIR/synopsys/vcs/vcs_setup.sh QSYS_SIMDIR=$QSYS_SIMDIR QUARTUS_INSTALL_DIR=$QUARTUS_INSTALL_DIR USER_DEFINED_ELAB_OPTIONS="\"$USER_DEFINED_ELAB_OPTIONS\"" SKIP_SIM=$SKIP_SIM TOP_LEVEL_NAME=$TOP_LEVEL_NAME

     

    After adding this switch the error message is converted to the following warning:

     

     Warning-[LOOP-REROLL-ENABLED] Loop reroll optimization is enabled <QUARTUS_INSTALL_DIR>/eda/sim_lib/synopsys/ctfb_hssi_atoms2_ncrypt.sv, 26

    It will affect the line debug capacity for this block. Please add the switch -Xrerolloff if you want to preserve line debug capacity for this block.

     

    Cadence Xcelium* simulator:

    Use the elaboration switch ( -warn_multiple_driver  ) in your script.

     

    Example:

    xmelab -warn_multiple_driver -relax -timescale '1 ps / 1 fs' -genhier -access +rwc <top_level_name>

     

    After adding this switch the error message is converted to the following warning:

    xmelab: *W,MULAXX (<QUARTUS_INSTALL_DIR>/eda/sim_lib/ctfb_hssi_atoms_ncrypt.sv): Multiple drivers to always_ff output variable clairvoyance_match detected..

     

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

     

    Related Products

    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs