Article ID: 000096595 Content Type: Error Messages Last Reviewed: 09/15/2023

Internal Error: Sub-system: CUT, File: /quartus/db/cut/cut_ffpll_loc_info.cpp, Line: 325

Environment

  • Intel® Quartus® Prime Standard Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Standard Edition Software version 22.1 and earlier, you might see this internal error when the CLKOUT port on a PLL_REFCLK_SELECT does not drive a FRACTIONAL_PLL. This can occur if there is a PLL clock output in the design that does not drive any logic.

    Resolution

    To workaround this problem, either ensure the PLL clock output does drive logic within the device or remove the unused PLL clock output.

    Related Products

    This article applies to 3 products

    Arria® V FPGAs and SoC FPGAs
    Cyclone® V FPGAs and SoC FPGAs
    Stratix® V FPGAs