Why might I see de-asserted tx_pll_locked or tx_ready signals with my Intel Agilex® 7 FPGA transceiver F-Tile design when using the Intel® Quartus® Prime Pro Edition Software versions 23.1 and earlier?

Due to a bug in the Intel® Quartus® Prime Pro Edition Software versions 23.1 and earlier, some F-Tile transmitters may remain in reset, which results in the tx_pll_locked or tx_ready signals being permanently de-asserted.

This problem is intermittent and may be seen with some Intel® Quartus® Prime Pro Edition Software compiled project programming files, but not others. This problem only affects Intel® Quartus® Prime Pro Edition Software designs that use more than one Intel Agilex® 7 FPGA F-Tile.

To fix this problem in the Intel® Quartus® Prime Pro Edition Software version 22.4 and 23.1, install the following patches:

• Patch 0.33 for Intel Quartus Prime Pro Edition Software version 22.4
• Patch 0.17 for Intel Quartus Prime Pro Edition Software version 23.1

To fix this problem in the Intel Quartus Prime Pro Edition Software versions 22.3 and earlier, you must upgrade your design to Intel Quartus Prime Pro Edition Software version 22.4 or 23.1 and install the corresponding patch.

This problem will be fixed in a future revision of the Intel® Quartus® Prime Pro Edition Software.