Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.1 and earlier, you might see an M20K RAM write error occurring after a partial reconfiguration (PR) operation.
This problem is caused by clock glitches at the clock MUX shared between static and PR design regions during the partial reconfiguration sequence. This problem only occurs on Intel Agilex® 7 F/I-series devices.
This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 23.2.
The tool will automatically fix the contention and floating issues on clock MUX to prevent M20K lockup during partial reconfiguration.
Note: In Intel® Quartus® Prime Pro Edition Software version 23.2 there are couple of scenarios that may cause M20K functional failure during the PR operation. For the latest update, refer to the KDB: Why do writes to an M20K fail after a Partial Reconfiguration?