Article ID: 000094101 Content Type: Troubleshooting Last Reviewed: 06/18/2023

Why does the example testbench for Intel® Arria® 10 Triple-Speed Ethernet Intel® FPGA IP does not complete simulation?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Triple-Speed Ethernet Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.4, the testbench for TSE (SGMII + GXB) receives only three packets out of five and the simulation does not complete. The problem occurs because the MAC drops the frames with less than 7 bytes of Preamble.

    Resolution

    The patch for the Intel® Quartus® Prime Pro Edition Software version 22.4 can be downloaded from the following links:

    The problem has been fixed starting in the Intel® Quartus® Prime Pro Edition Software v23.1.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs