Article ID: 000093673 Content Type: Troubleshooting Last Reviewed: 05/29/2023

Why does the Intel Agilex® 7 FPGA P-Tile Multi-Channel DMA Intel® FPGA IP for PCI Express* BAM and BAS mode cause host systems to fail to boot when a VFIO-based driver is being used?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Interfaces
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, the Intel Agilex® 7 FPGA P-Tile Multi-Channel DMA Intel® FPGA IP for PCI Express* Bursting Avalon® Master (BAM) and Bursting Avalon® Slave (BAS) mode configuration incorrectly advertises Function Level Reset (FLR) capability when this is NOT supported in this mode.

    This can then cause the host system to fail to boot if Virtual Function IO (VFIO) based driver is used.

     

     

    Resolution

    To stop the Intel Agilex® 7 FPGA P-Tile Multi-Channel DMA Intel® FPGA IP for PCI Express* BAM and BAS incorrectly advertising FLR capability in the Intel® Quartus® Prime Pro Edition Software version 22.3, please install the patch below:

    Download and install Patch 0.30 from the appropriate link below.:

    This problem has been fixed starting with the Intel® Quartus® Prime Pro Edition Software version 22.4.

    Related Products

    This article applies to 2 products

    Intel Agilex® 7 FPGAs and SoC FPGAs
    Intel® Stratix® 10 DX FPGA