For the F-tile Interlaken Intel® FPGA intellectual property (IP) design with FGT PMA type and non-return to zero (NRZ) modulation, you might see the following message when you reset the FGT PMA using the F-tile Transceiver Toolkit (TTK) interface "RX Reset FGT PMA" and "TX Reset FGT PMA":
INFO: Error in receiving data from the server. Please try again.
This is due to the F-tile Transceiver Toolkit performing the resets through the Datapath Avalon® Memory Mapped Interface, however, the F-tile Interlaken Intel FPGA IP does not instantiate Datapath Avalon Memory Mapped Interface for FGT NRZ variants.
To work around this problem, you can reset the FGT PMA by writing to the reset port using the System Console. There are reset functions implemented to reset and release the tile reset port in the sysconsole_testbenh.tcl file:
For TX side:
- tx_reset -> To reset the tx tile reset
- tx_reset_rel -> To release the tx tile reset
For RX side:
- rx_reset -> To reset the rx tile reset
- rx_reset_rel -> To release the rx tile reset