Why there is no video output seen after programming the SDI II Intel® FPGA IP multi-rate or triple-rate design with the Intel Agilex® 7 device using the Intel® Quartus® Prime Pro Edition Software Programmer v22.2?

Due to a problem in the Intel® Quartus® Prime Pro Edition Software Programmer version 22.2, no SDI II video output is displayed on the receiver side when using the SDI II Intel® FPGA IP multi-rate or triple-rate designs on Intel Agilex® 7 devices. This is due to the rx_ready signal not being asserted after performing dynamic reconfiguration of the F-Tile PHY transceiver. This issue impacts all SDI II Intel® FPGA IP design examples that support dynamic reconfiguration.   

A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software Programmer version 22.2. 

Download and install Patch 0.06 from the following links:

• Version 22.2 Patch 0.06 for Windows (.exe) 
• Version 22.2 Patch 0.06 for Linux (.run)
• Readme for version 22.2 Patch 0.06 (.txt)

This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.