Article ID: 000091250 Content Type: Troubleshooting Last Reviewed: 03/20/2023

How do I perform word alignment in the Intel® FGT or FHT transceiver F-Tile PMA/FEC Direct PHY Intel® FPGA IP?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    There is no word alignment logic function in the Intel® FGT or FHT transceiver of the F-Tile PMA/FEC Direct PHY Intel® FPGA IP when you are not using the FEC.

     

    Resolution

    When you are not using the FEC in the Intel® FGT or FHT transceiver F-Tile PMA/FEC Direct PHY Intel® FPGA IP, you can implement your own word alignment logic on the rx_parallel_data bus in the FPGA fabric.

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    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs