Article ID: 000091009 Content Type: Troubleshooting Last Reviewed: 06/20/2023

Why do you get the value '0xdeadc0de' when reading the register KHZ_REF of the Low Latency 40-Gbps Ethernet Intel® Stratix®10 IP?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Low Latency 40G Ethernet Intel® FPGA IP
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    Description

    Due to a problem in the Low Latency 40-Gbps Ethernet Intel® Stratix® 10 IP Core User Guide, the register KHZ_REF shown in Table 26 PHY Registers is incorrect because it does not exist in the IP core.

     

     

    Resolution

    This problem is scheduled to be fixed in a future release of the Low Latency 40-Gbps Ethernet Intel® Stratix® 10 IP Core User Guide.

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