Due to a problem in the Intel® Quartus® Prime Pro Edition Software Programmer version 22.1, no SDI II video output is displayed on the receiver side when using the SDI II Intel® FPGA IP multi-rate or triple-rate designs on the Intel Agilex® 7 devices. This is due to the rx_ready signal not being asserted after performing dynamic reconfiguration of the F-Tile PHY transceiver. This problem impacts all SDI II Intel® FPGA IP design examples that support dynamic reconfiguration.
To work around this issue, use the Intel® Quartus® Prime Pro Edition Software Programmer version 21.4 (stand-alone software) to download the .sof file generated from the Intel® Quartus® Prime Pro Edition Software version 22.1.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.