Article ID: 000087072 Content Type: Troubleshooting Last Reviewed: 11/30/2011

Stratix V Hard IP for PCI Express Root Port Bus and Device Number Restrictions

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The Stratix V Hard IP for PCI Express Root Port Bus Number and Device Number are restricted to the value 0.

    Resolution

    When accessing the Root Port Configuration Space you must assign the Root Port Bus Number and Device Number the value 0.

    Related Products

    This article applies to 1 products

    Stratix® V FPGAs