Due to a problem in the Intel® Quartus® Prime Pro Software version 17.1 and earlier, you may see this internal error when compiling an Intel Stratix® 10 project which contains an External Memory Interfaces Intel Stratix 10 FPGA IP and the following qsf assignment:
set_global_assignment -name ENABLE_SMART_VOLTAGE_ID ON
Internal Error: Sub-system: SIN, File: /quartus/tsm/sin/sin_micro_tnodes_dag.cpp, Line: 978
Problem encountered while reading the specified SIN_MICRO_TNODES_DAG from disk [17.1.2/304/linux64/quartus/common/devinfo/14nm/ddb_nadder_emif_fls_vid2]
This internal error may also be seen when migrating a project to Quartus Prime Pro Software version 18.0.
The ENABLE_SMART_VOLTAGE_ID assignment set to ON is not supported for Stratix 10 FPGA devices. Change the qsf assignment to
set_global_assignment -name ENABLE_SMART_VOLTAGE_ID OFF
Stratix 10 VID parameters are set up in Assignments > Device > Device and Pin Options > Power Management and VID
In the Quartus Prime Pro Software version 18.0, the SmartVoltage ID setting is greyed out in Settings > Operating Settings and Conditions