Article ID: 000086426 Content Type: Troubleshooting Last Reviewed: 02/09/2023

verilog hdl or vhdl error: decryption of data_block failed

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 18.1 and earlier, you may see this error message in the synthesis stage when migrating an IP.

    Resolution

    To work around this problem, regenerate manually affected IP in Platform Designer.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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