Due to a problem in the Quartus® Prime software and Intel® FPGA SDK for OpenCL™ version 14.1 and later for Cyclone V SoC platform, when integrating a custom RTL module into the OpenCL design, compile may fail with Cyclone® V SoC platform only for error below:-
Compiler Error: Unrecognized function call: acl.external.iowr.i1.si32.p4si32
This problem has been fixed in the Quartus® Prime software and Intel® FPGA SDK for OpenCL™ version 17.0 for the Cyclone V SoC platform.
As a workaround, user can open up the cyclonev_tsm.xml file and add in the code below, this code is also available in the Stratix® V platform.
<!-- acl.external.iord callinst -->
<group acl_intrinsic="acl.external.iord">
<type base="any">
<style name="default">
<max-latency value="1"/>
<min-capacity value="1"/>
</style>
</type>
</group>
<!-- acl.external.iowr callinst -->
<group acl_intrinsic="acl.external.iowr">
<type base="any">
<style name="default">
<max-latency value="1"/>
<min-capacity value="1"/>
</style>
</type>
</group>