Article ID: 000084977 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why isn't slow slew rate control an available logic option for Stratix® II and Cyclone® II devices?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The slow slew rate logic option on previous device families manipulated drive strength settings to achieve different edge rates on the output buffers. Stratix®  II and Cyclone®  II devices offer more drive strength settings per I/O standard. Slew rate can be changed by using different drive strength settings. Fast edge rates can be
achieved with larger current settings, slower rates can be achieved with lower current settings. Use the device family's IBIS models to determine actual edge rates for each drive strength setting per I/O standard.

IBIS models for Altera® devices can be downloaded at www.altera.com.

Related Products

This article applies to 2 products

Cyclone® II FPGA
Stratix® II FPGAs