LCD_D_CSn I/O Pin Assignment
The Cyclone® III FPGA Development Kit Reference Manual has incorrect pin out information for the LCD peripheral. In Table 2-36, the LCD chip select signal (LCD_D_CSn) should be assigned to pin AC24 instead of pin AB24.
The cycloneIII_3c120_niosII_standard reference design includes the incorrect pin assignment, and must be changed prior to design compilation.
For further information related to this development kit, see the Errata section of the Cyclone III FPGA Development Kit product page.
Schematic note on sheet 10 "PLACE CAPS NEAR U22"
In sheet 10 of the Cyclone® III Development Board Schematic, there is a note "PLACE CAPS NEAR U22". These capacitors are (C198, C216, C226, C158, C227, C228, C229, C218, C199). However, on the actual development board and the PCB layout, these capacitors are placed near to U13 (DDR2SRAM), not U22.
This is a typo on sheet 10 in the Cyclone III Development board schematic. The actual development board PCB layout is correct. These capacitors (C198, C216, C226, C158, C227, C228, C229, C218, C199) should be placed near to U13.