Description
Due to a known Quartus® II software issue in version 12.1sp1, incorrect settings are causing CRC errors to be seen after configuration in Cyclone® V devices. This affects the following device densities:
- 5CEA5
- 5CGXC4
- 5CGXC5
- 5CGTD5
This will cause the device to function improperly in user mode.
One characteristic is a stuck bit either at 1 or 0 in affected designs. To determine if you are affected by this, probe the CRC_error pin or use the soft CRC_error IP, refer to AN539 Test Methodology of Error Detection and Recovery using CRC in Altera FPGA Devices (PDF) on how to implement soft CRC_error IP.
Resolution
Update your Quartus II software to version 13.0 for any Cyclone V designs targeting the affected devices.