ERROR: Illegal assignment: enable_eram_preload. Specify a legal assignment name.

You might receive the following error message when you use signal compiler block to compile the FFT Intel® FPGA IP design with Intel® MAX® 10 devices in the DSP Builder for Intel FPGAs software:

ERROR: Illegal assignment: enable_eram_preload. Specify a legal assignment name.
 

To work around this problem, follow these steps:

1. Open the \'Advanced\' tab of the Signal Compiler.
2. Click on \'Analyze\'. This stage analyzes the DSP Builder for Intel FPGAs Standard Blockset design and creates the Quartus® II project. Please ignore the error reported at this stage.
3. Edit the <model_name>.qsf file that is located at <model_name>_dspbuilder directory that has been created at the same level where the model file is.
4. Change MAX 10 FPGA to just MAX 10.
5. Add set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE COMP IMAGE WITH ERAM".
6. Go back to Signal Compiler and run the \'Synthesis\' and \'Fitter\' steps to complete the Quartus® software compilation.

This problem is fixed in the Quartus II software v15.0.