Article ID: 000083926 Content Type: Troubleshooting Last Reviewed: 03/11/2023

Why do I see the read data of all High when I read the last address from M20K RAM?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

This is caused by software issues. The impact of this issue is when you use Stratix® V device M20K with Single Port RAM and dual clock port mode.

 

 

Resolution

Install the patch below for the Intel® Quartus® II software version 13.0

  • Download the version 13.0 patch 0.45 for Windows (.exe)
  • Download the version 13.0 patch 0.45 for Linux (.tar)
  • Download the Readme for the Quartus II software version 13.0 patch 0.45 (.txt)

 

Related Products

This article applies to 1 products

Stratix® V GX FPGA