Article ID: 000081452 Content Type: Troubleshooting Last Reviewed: 12/31/2013

At what stage in the Quartus II compilation process are the MIF files generated for Stratix V, and Arria V devices using transceiver dynamic reconfiguration?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The MIF files are generated in the Quartus® II software Assembler stage for Stratix® V and Arria® V transceiver devices.

Related Products

This article applies to 7 products

Stratix® V GT FPGA
Stratix® V GX FPGA
Stratix® V GS FPGA
Arria® V SX SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V GT FPGA

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