Due to a problem in the Quartus® II software versions 9.1 and later, you may see this error during the Assembler stage for designs targeting Arria® II GX devices. This error occurs if your design violates the rules in Guidelines for DPA-Disabled Differential Channels in the High-Speed Differential I/O Interfaces and DPA in Arria II Devices (PDF) chapter in the Arria II Device Handbook.
To resolve this issue, modify the placement of your DPA-enabled LVDS interfaces to comply with these rules.
This problem is scheduled to be resolved in a future release of the Quartus II software.