Description
The sld_virtual_jtag megafunction model may give incorrect results during functional simulation if you specify an instruction register (IR) width of less than or equal to 3 bits in the Quartus® II software version 6.0. However, the design does synthesize and operate correctly in the device.
This issue has been fixed in the Quartus II software version 6.0 SP1.
To avoid this problem in the Quartus II software version 6.0, set the IR width to a value greater than 3 for functional simulation. When you have completed functional simulation, you can set the value to the desired number for the regular compilation.