Article ID: 000079380 Content Type: Troubleshooting Last Reviewed: 06/28/2012

Low Frequency Limit for DDR2 and LPDDR2 on Arria V and Cyclone V Devices

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    This problem affects DDR2 and LPDDR2 products.

    For Arria V devices, DDR2 and LPDDR2 interfaces at frequencies less than 200 MHz will not operate correctly.

    For Cyclone V devices, DDR2 and LPDDR2 interfaces at frequencies less than 167 MHz will not operate correctly.

    Resolution

    The workaround for this issue is to not use frequencies less than 200 MHz for Arria V devices, or 167 MHz for Cyclone V devices.

    This issue will not be fixed.

    Related Products

    This article applies to 2 products

    Arria® V FPGAs and SoC FPGAs
    Cyclone® V FPGAs and SoC FPGAs