You will see this warning generated by the EDA Netlist Writer in the Quartus® II software version 11.0 and previous versions when creating IBIS models for the Cyclone® IV device family for dedicated clock input pins using the LVDS I/O standard.
You will need to manually edit the .ibs file to add the appropriate LVDS IBIS model for the dedicated clock input pins. Use the lvds25_rdin model for dedicated clock input pins on row I/O banks; use the lvds25_cin model for dedicated clock input pins on column I/O banks.
The Cyclone IV IBIS models can be downloaded from Altera IBIS Models.