Description
Yes, the clock frequency determines how fast the error detection circuitry can run for the Cyclic Redundancy Check (CRC) calculation. For Stratix® II, Cyclone® II, Cyclone III and previous FPGA devices, the CRC checking frequency specification is for the entire device while Stratix III and Stratix IV devices is per-frame.
Therefore, in Stratix III and Stratix IV devices, the specification will be interpreted as the clock frequency for error detection circuitry to run through the CRC checking for one frame. Once this frequency is set, the circuitry will check every data frame using the same clock frequency.