Article ID: 000078787 Content Type: Error Messages Last Reviewed: 11/14/2013

Critical Warning (10169): Verilog HDL warning at alt_mem_ddrx_controller.v(495): the port and data declarations for array port "afi_rrank" & "afi_wrank" do not specify the same range for each dimension

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description You may see this critical warning when implementing a DDR2 SDRAM interface using DDR2 SDRAM High Performance Controller II with ALTMEMPHY IP version 12.0. There is a mismatch with the afi_rrank and afi_wrank port size declarations due to parameter not being passed in correctly. However, it will not affect the functionality because afi_rrank and afi_wrank are not used in the DDR2 controller.
    Resolution

    This problem was fixed with the Quartus II software version 12.1 and later.

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