Article ID: 000078576 Content Type: Product Information & Documentation Last Reviewed: 02/13/2006

How do I instruct the MAX PLUS® II Compiler to generate a Timing Simulator Netlist File (.snf) for a device with a 5.0-V core and 3.3-V I/O pins?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description In the MAX PLUS II software version 8.0 and higher, perform the following steps in the Compiler:
  1. Choose Global Project Device Options (Assign menu).
  2. Turn on Low Voltage.
  3. Choose OK.

You cannot perform this action in MAX PLUS II version 7.22 and lower. To obtain the correct timing using these MAX PLUS II software versions, refer to the device family data sheet for the device you are targeting for the timing parameters. Substitute tOD2 for tOD1 to get the proper delay.

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Intel® Programmable Devices