Article ID: 000077997 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does the Altera_PLL ModelSim-Altera simulation results show an incorrect phase shift when changing the input clock frequency?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

If you implement the Altera_PLL output counter phase shift in degree units in the MegaWizard® Plug-In Manager and dynamically change the input frequency value, the simulation result on the phase shift might not be correct.

This issue occurs because currently the MegaWizard Plug-In Manager generated file stores the phase shift information in time period units instead of degree units.

Currently this impacts the Quartus® II software version 12.0.

Resolution

You need to manually change the phase shift in time period units if you change the input frequency of your PLL in simulation. 

This will be fixed in a future version of the Quartus II software.

Related Products

This article applies to 4 products

Stratix® V E FPGA
Stratix® V GS FPGA
Stratix® V GT FPGA
Stratix® V GX FPGA