Article ID: 000077657 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Do all Cyclone devices phase-locked loops (PLLs) support the external clock output pin PLL[2..1]_OUT?

Environment

  • PLL
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description No, the EP1C3 FPGA in the 100-pin thin quad flat pack (TQFP) package and PLL2 of the EP1C6 FPGA in the 144-pin TQFP package do not support an external clock output.

    Related Products

    This article applies to 1 products

    Cyclone® FPGAs