Article ID: 000077328 Content Type: Troubleshooting Last Reviewed: 11/28/2024

Why doesn't the global or per pin assignment for the unused transceiver channel work for the Stratix®10 L- or H-Tile design when all the channels in a transceiver tile are unused?

Environment

  • Intel® Quartus® Prime Pro Edition
  • L-Tile H-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    In the Stratix®10 L- or H-Tile design, for the preserve unused channel QSF to take effect, at least one channel in a transceiver tile needs to be instantiated in the design. You can create a dummy channel in a Tile, and apply the global or per pin assignment.

    Resolution

    There is currently no plan to fix this problem. 

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

    Need more help?

    Contact support

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.