Arria® II Device Handbook: Known Issues

Issue 156383: Clock Networks and PLLs in Arria II Devices, Version 4.2

There are two bullets for requirements when using automatic clock switchover, the first one is incorrect. It says:

"Both clock inputs must be running."

The purpose of automatic clock switchover is to switch between clocks if one stops running. The actual requirement is both clocks need to be running when the FPGA is configured. The bullet should say:

"Both clock inputs must be running when the FPGA is configured."

Issue 116251: I/O Features in Arria II Devices, version 4.2

Page 6-26 says the following: "Arria II GX devices support calibrated RS OCT and Arria II GZ devices support calibrated RS and RT OCT on all I/O pins."

This is incorrect, it should instead say "Arria II GX devices support calibrated RS OCT on all I/O pins except RUP and RDN pins when used as regular I/O. Arria II GZ devices support calibrated RS and RT OCT on all I/O pins."

Issue 71253: High-Speed Differential I/O Interfaces and DPA in Arria II Devices, version 4.3

Page 13 has the following text:

The DPA circuitry loses lock when it switches phases to maintain an optimal sampling phase. After it is locked, the DPA circuitry can lose the lock status under either of the following conditions:
. One phase change (adjacent to the current phase)
. Two phase changes in the same direction

This is incorrect, the ALTLVDS megafunction does not support these options for the DPA lock circuit. 

Page 13 also states the required number of transitions for the DPA to lock is 256.  This is not correct, refer to the Device Datasheet for Arria II Devices (PDF) for DPA training requirements.

Issue 57966: Device Datasheet for Arria II Devices, version 4.2

Table 1-68 in the Glossary section has incorrect waveforms shown in Differential I/O Standards.  The Receiver Input Waveforms are swapped with the Transmitter Output Waveforms.  VOD is a parameter associated with transmitters, VID is a parameter associated with receivers.

Issue 376143:  I/O Features in Arria® II Devices, version 4.0

Table 6-10 shows MultiVolt I/O support for Arria II Devices.  The notes regarding the clamp diode recommendations are not correct.  Note 3 is marked for the 3.0V and 3.3V input signal cases when VCCIO is 2.5V, 3.0V, and 3.3V.  Note 3 states "Altera recommends using an external clamp diode on the column I/O pins when the input signal is 3.0V or 3.3V." 

This note is incorrect - it should read as follows to capture the correct I/O pins and the correct device family since Arria II GX devices have the PCI clamp diode on all I/O pins, Arria II GZ devices support the PCI clamp diode only on column I/O pins.  The note should read: "Altera recommends using an external clamp diode on the row I/O pins when the input signal is 3.0V or 3.3V for Arria II GZ devices."

Secondly, another condition is not included in the table.  When VCCIO is 2.5V and the input signal is 3.0V or 3.3V, Altera recommends using an external clamp diode. There could be a DC current through the diode in this case which could exceed the maximum DC current limit for the internal PCI clamp diode.  This applies to Arria II GX and Arria II GZ devices.

Issue 36335: Configuration, Design Security, and Remote System Upgrades in Arria II Devices, version 4.0

Based on table 9-18, TRST.

"The TRST pin is powered the Vccio power supply for Arria II GX devices & the Vccpd power supply for Arria II GZ devices."  > Incorrect statement.

Should change to

The TRST pin is availabe for Arria II GZ device only & its powered by Vccpd power supply. Arria II GX device do not has any TRST pin.

Issue 36585: Configuration, Design Security, and Remote System Upgrades in Arria II Devices, version 4.2

On page 9-11 for FPP Configuration Using a MAX® II Device as an External Host it states "FPP configuration using compression and an external host provides the fastest method to configure Arria II devices." but this incorrect and will be corrected to state "FPP configuration using an external host provides the fastest method to configure Arria II devices."Issue 385004: Configuration, Design Security, and Remote System Upgrades in Arria II Devices, version 4.1

Resolved issues:

Issue 385004: Configuration, Design Security, and Remote System Upgrades in Arria II Devices, version 4.1

Table 9-8. Uncompressed .rbf Sizes for Arria II Devices is in the process of being updated to reflect updated .rbf file sizes for the following devices.

Issue 364484: Configuration, Design Security, and Remote System Upgrades in Arria II Devices, version 4.0

there is known issue in table 9-9 and table 9-12 of device handbook version 4.0.

The unit of tCFG, tSTATUS, tCF2ST1, tCF2CK, tST2CK should be us while not ns.