Description
Due to a problem in the Intel® Quartus® Prime Pro Edition software version 20.2 and earlier, you may see this error when trying to generate the example design for the Intel® FPGA P-Tile Avalon® Memory Mapped IP for PCI Express* with “Enable HIP dynamic reconfiguration of PCIe registers” feature enable.
Resolution
This problem is fixed starting with the Intel Intel® Quartus® Pro Edition software version 20.3.