In the Quartus II software version 4.2 and 5.0, designs using the M4K blocks in Stratix II devices may be susceptible to intermittent read failures due to an issue with the configuration settings for the M4K memory blocks. Refer to the Stratix II FPGA Family Errata Sheet for a description of the issue and an explanation of the memory configurations that can be affected. This issue does not affect your design if it was compiled in the Quartus II software version 5.0 SP2, 5.1 or above.
You can determine if your specific design is affected by the issue using the Stratix II SOF File Checker Utility. Download the utility from the following location: ftp.altera.com/outgoing/release/check_stratixii_m4k.exe. To log on to the FTP site from a command prompt, use "anonymous" as the user name and your email address as the password.
Run the utility from a command prompt using the following command to check the SRAM Object File (.sof) generated for the project:check_stratixii_m4k <name of .sof programming file>
The utility reports one of the following results:
- There are no M4K problems in the design, in which case your programming file is not affected by the issue and is safe to use.
- Certain M4K blocks in your design are affected by the issue and may be susceptible to intermittent read failures.
If your design contains memory blocks that are affected by the issue, you must do the following:
- Recompile the design in the Quartus II software version 5.1 or later to create new programming files. Altera recommends using the latest version of the software.
- Note: If you compiled the design in version 5.0 or 5.0 SP1, you can run the Assembler in version 5.0 SP2 instead to generate new programming files without performing a full compilation, and then run the Timing Analyzer.
- Check the timing analysis results to ensure that your timing requirements are met. The device timing models are updated to account for this M4K read issue.