Article ID: 000076719 Content Type: Troubleshooting Last Reviewed: 04/12/2023

Should I set the test_in bus to 0 as described in the Test Interface Signals sections of the IP Compiler for PCI Express User Guide?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

This is an error in the document. Do not do this.

Resolution

Intel recommends setting test_in = 0x3A8 for hardware, or 0x3A9 for simulation.

Related Products

This article applies to 4 products

Cyclone® IV GX FPGA
Stratix® IV GX FPGA
Arria® II GX FPGA
Arria® II GZ FPGA

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.