Which Intel® Stratix® 10 Development kit can be used to evaluate the H-tile Hard IP for Ethernet Intel® Stratix® 10 FPGA IP?

Due to transceiver placements requirements the H-tile Hard IP for Ethernet Intel® Stratix® 10 FPGA IP can only be fully evaluated on the DK-DEV-1SMX-H-A Stratix® 10 MX FPGA Development Kit.

On this kit both QSFP modules are routed to the required transceiver channels for H-tile Hard IP for Ethernet evaluation.

Stratix® 10 MX FPGA Development Kit.

The QSFP modules on the following kits are not routed to the required H-Tile Hard MAC transceiver channels, so cannot be used for full H-Tile Hard Ethernet MAC evaluation:

DK-DEV-1SGX-H-A Intel® Stratix® 10 FPGA Dev Kit

DK-SI-1SGX-H-A Intel® Stratix® 10 GX Signal Integrity Development Kit

DK-SI-1STX-E-A Intel® Stratix® 10 TX Signal Integrity Development Kit

The DK-SOC-1SSX-L-A Intel® Stratix® 10 SoC Development Kit is only available in L-Tile configuration, so cannot be used for H-Tile IP evaluation.