Why does a signal crossing event occur between two adjacent pins during power-up of Arria II, Stratix II, Stratix III or Stratix IV devices ?

When a signal drives a pin which supports true LVDS input or output in Arria® II, Stratix® II, Stratix III or Stratix IV devices, you may see the signal crossing to the adjacent pin which is the complimentary pin of the LVDS pin pair during power-up.  This signal crossing event may happen only when VCC or VCCINT crosses the intermediate voltage after VCCIO is powered.  When VCC or VCCINT reaches the recommended operating range, the signal crossing doesn't occur.

This behaviour does not apply to :

• Pins which only support emulated LVDS
• Devices without on-chip parallel termination option for LVDS
• Devices with power sequencing where VCC or VCCINT is ramped up before VCCIO

To prevent this signal crossing event, power up VCCIO after VCC or VCCINT reaches the recommended operating range.