Article ID: 000076036 Content Type: Troubleshooting Last Reviewed: 01/01/2015

What multicycle assignments are needed when using the altlvds_tx MegaWizard Plug-In Manager with the external PLL option in Stratix II devices?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Application Note 409: Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices (PDF) shows the multicycle assignment necessary when using altlvds_rx MegaWizard® Plug-In Manager with the external PLL option in Stratix® II devices.  When using the altlvds_tx MegaWizard Plug-In Manager with the external PLL option, you will need to make Multicycle and Multicycle Hold assignments to the sclkout port of the PLL.  Here is an example that shows how to make these multicycle assignment where the PLL is design instance 2 and sclkout0 is connected to the altlvds_tx MegaWizard Plug-In Manager function.

    set_instance_assignment -name MULTICYCLE (serialization factor -1) -from * -to "lvds_pll:inst2|altpll:altpll_component|_sclkout0"

    set_instance_assignment -name MULTICYCLE_HOLD (serialization factor) -from * -to "lvds_pll:inst2|altpll:altpll_component|_sclkout0"

     

    Related Products

    This article applies to 1 products

    Stratix® II FPGAs