Article ID: 000075922 Content Type: Troubleshooting Last Reviewed: 08/30/2015

RapidIO IP Core User Guide Lists Outdated Instructions for ModelSim Simulation of Non-Arria 10 IP Core Variations

Environment

  • Quartus® II Subscription Edition
  • Simulation
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The RapidIO IP core testbench simulation instructions changed in the IP core v14.1 and later, for IP core variations that target a non-Arria 10 device. The user guide testbench simulation instructions for both the ModelSim simulator and the VCS simulator include instructions to run the srio_simulator.tcl script. However, this script is no longer required and is no longer provided with the IP core. The RapidIO MegaCore Function User Guide is not updated with this change.

    Refer to the related erratum RapidIO Core User Guide Lists Wrong TOP_LEVEL_NAME for ModelSim Simulation of Non-Arria 10 IP Core Variations.

    Resolution

    When simulating the testbench for the RapidIO IP core v14.1 and later, with the ModelSim simulator or the VCS simulator, skip instructions 1. and 2., which tell you to run the srio_simulator.tcl script.

    This issue will be fixed in a future version of the RapidIO MegaCore Function User Guide.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs