Article ID: 000075902 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does the Quartus II software report a VCO frequency that is less than the fVCO (PLL VCO operating range) as shown in the device Datasheet?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The VCO frequency reported by the Quartus® II software in the PLL summary section of the compilation report takes into consideration the VCO post-scale counter K value. Therefore, if the counter K has a value of 2, the frequency reported will be the VCO frequency divided by two, and this can be lower than the fVCO specification.

Related Products

This article applies to 19 products

HardCopy™ III ASIC Devices
Arria® GX FPGA
HardCopy™ IV GX ASIC Devices
Cyclone® III LS FPGA
Stratix® IV E FPGA
Cyclone® IV GX FPGA
Stratix® IV GT FPGA
Arria® II GX FPGA
HardCopy™ IV E ASIC Devices
Cyclone® III FPGAs
Stratix® V GX FPGA
Cyclone® IV E FPGA
Cyclone® II FPGA
Stratix® V GT FPGA
Stratix® V GS FPGA
Stratix® II GX FPGA
Stratix® II FPGAs
Stratix® IV GX FPGA
Stratix® III FPGAs