This is due to the inconsistent settings between the IP compiler for PCI® Express and the ALTGX,
such as the IP compiler for PCI Express being set to x4 lanes, however in the ALTGX it displays as x8 lanes.
Hence it triggers an Internal error similar to the one below:
Internal Error: Sub-system: FHSSI, File: /quartus/fitter/fhssi/fhssi_cell_group.cpp, Line: 2881
index < m_slave_quad_groups.size()
Stack Trace:
0x36689: FHSSI_TGT_MGR_IMPL::indicate_atom_was_added_to_netlist 0x2b859 (FITTER_FHSSI)
0x628b3: FHSSI_LEGALITY_IMPL::are_reset_sources_valid_for_cmu 0x1f3 (FITTER_FHSSI)
0x6bae6: FHSSI_LEGALITY_IMPL::are_reset_sources_valid 0x4e6 (FITTER_FHSSI)
0x70a80: FHSSI_LEGALITY_IMPL::are_hssi_atoms_legal 0xe0 (FITTER_FHSSI)
0xa18a: FTITAN_LUT_RAM_CONVERSION_UTIL::lutram_iterm_port_is_internal_registered 0x68da (fitter_ftitan)
0x4515f: FITCC_EXPERT::fitter_preparation 0x23f (FITTER_FITCC)
0x46f97: FITCC_EXPERT::invoke_fitter 0x427 (FITTER_FITCC)
0x29c5: ftitan_execute 0x265 (fitter_ftitan)
0xb55d: fmain_start 0x7cd (FITTER_FMAIN)
0x1264b: qexe_get_command_line 0x1c5b (comp_qexe)
0x1588d: qexe_process_cmdline_arguments 0x5ad (comp_qexe)
0x159a1: qexe_standard_main 0xa1 (comp_qexe)
0x1a48: MSG_INITIALIZER::~MSG_INITIALIZER 0x118 (CCL_MSG)
0x19ec: MSG_INITIALIZER::~MSG_INITIALIZER 0xbc (CCL_MSG)
0x84a8: mem_purify_is_running 0x258 (ccl_mem)
0x3379f: msg_exe_main 0x8f (CCL_MSG)
0x1964b: BaseProcessStart 0x2b (kernel32)
End-trace
To work around this problem, delete the <variant>_serdes.v file and regenerate the core.